Design & Reuse
915 IP
601
0.118
Input VCC18V=1.8V, 1.8V Power On Reset for North-South Orientation; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset for North-South Orientation; UMC 28nm HPC Logic Process...
602
0.118
Input VCC18V=1.8V, 1.8V Power On Reset; UMC 28nm HPC Logic Process
Input VCC18V=1.8V, 1.8V Power On Reset; UMC 28nm HPC Logic Process...
603
0.118
Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset without Vfr; UMC 55nm LP Logic Process...
604
0.118
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC3V=3.3V, 3.3V Power On Reset; UMC 55nm LP Logic Process...
605
0.118
Input VCC=0.9V, 0.9V Power On Reset without Vfr; UMC 28nm HPC Logic Process
Input VCC=0.9V, 0.9V Power On Reset without Vfr; UMC 28nm HPC Logic Process...
606
0.118
Input VCC=1.1V& VCC3V=3.3V, 1.1/3.3V Power On Reset; UMC 40nm LP Logic Process
Input VCC=1.1V& VCC3V=3.3V, 1.1/3.3V Power On Reset; UMC 40nm LP Logic Process...
607
0.118
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm eflash Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm eflash Logic Process...
608
0.118
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP Logic Process...
609
0.118
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP/SST Logic Process
Input VCC=1.2V & VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm uLP/SST Logic Process...
610
0.118
Input VCC=1.2V& VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm LP Logic Process
Input VCC=1.2V& VCC3V=3.3V, 1.2/3.3V Power On Reset; UMC 55nm LP Logic Process...
611
0.118
Power input 1.8v, VBG=0.75V Band-gap, UMC 28nm HPC Logic process
Power input 1.8v, VBG=0.75V Band-gap, UMC 28nm HPC Logic process...
612
0.118
Power input 3.3V, Comparator , UMC 55nm uLP/HVT Low-K Logic Process Ultra High Density (6T) C60 Core Cell Library
Power input 3.3V, Comparator , UMC 55nm uLP/HVT Low-K Logic Process Ultra High Density (6T) C60 Core Cell Library...
613
0.118
Power input 3.3V, Comparator ; UMC 55nm SST uLP/HVT Low-K Logic Process
Power input 3.3V, Comparator ; UMC 55nm SST uLP/HVT Low-K Logic Process...
614
0.118
Power input 3.3V, VBG=1.204V Band-gap, UMC 55nm eFlash process
Power input 3.3V, VBG=1.204V Band-gap, UMC 55nm eFlash process...
615
0.118
Power Management Unit(5-sets DC-DC, 2-sets REG, PowerSwitch, and Li-ion Charger) for Audio Platform; UMC 0.35um 3.3V/5V CDMOS process
Power Management Unit(5-sets DC-DC, 2-sets REG, PowerSwitch, and Li-ion Charger) for Audio Platform; UMC 0.35um 3.3V/5V CDMOS process...
616
0.118
Power on Reset IP, Input: 1.0V, UMC 65nm SP process
Vrr=0.67V, Vfr=0.62, input 1.0V, Core type, Power On Reset, UMC 65nm SP/RVT Low-K process....
617
0.118
Power on Reset IP, Input: 1.0V, UMC 90nm SP process
Vrr=0.67V Vfr=0.63V, input 1.0V, Core type, Power On Reset (with Self-Test Circuit), UMC 90nm SP/RVT Logic Low-K process....
618
0.118
Power on Reset IP, Input: 1.0V, Vrr=0.67V, Vfr=0.62V, UMC 55nm SP process
Vrr=0.67V, Vfr=0.62V, input 1.0V, Core type, Power On Reset, UMC 55nm SP/RVT Low-K process....
619
0.118
Power on Reset IP, Input: 1.0V/3.3V, UMC 40nm LP process
Vrr=2.33V Vfr=2.26V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request, UMC 40nm LP/RVT Low-K Logic process....
620
0.118
Power on Reset IP, Input: 1.0V/3.3V, UMC 90nm SP process
Vrr=2V Vfr=1.95V, input VCCK=1.0V VCC3IO=3.3V, 3.3V Power On Reset, special request by ASAL, UMC 90nm SP/RVT Low-K Logic process....
621
0.118
Power on Reset IP, Input: 1.1V, UMC 40nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.1V, 1.1V Power On Reset, UMC 40nm LP/RVT Low-K Logic process....
622
0.118
Power on Reset IP, Input: 1.2V, UMC 0.11um HS/AE process
Power on reset(POR) block, UMC 0.11um HS/AE (AL Advance Enhancement) Logic process....
623
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=12.7uA, HS process with A-type IO., Power On Reset, UMC 0.13um HS/FSG Logic process....
624
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
625
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.75V Vfr=0.65V, input 1.2V, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
626
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um HS/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=11.7uA, Core type, Power On Reset, UMC 0.13um HS/FSG Logic process....
627
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um LL/FSG process
Vrr=0.8V Vfr=0.65V, VCC=1.2V, Ivcc=10.7uA, Core type, Power On Reset, UMC 0.13um LL Logic(FSG) process....
628
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process
Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....
629
0.118
Power on Reset IP, Input: 1.2V, UMC 0.13um SP/FSG process
Vrr=0.76V Vfr=0.66V, input 1.2V, Core type, Power On Reset, UMC 0.13um SP Logic(FSG) process....
630
0.118
Power on Reset IP, Input: 1.2V, UMC 90nm LL process
Vrr=0.7V, Vfr=0.65V, input VCCK=1.2V, Core Type Power On Reset, UMC 90nm Logic/Mixed-Mode LL/RVT Low-K process....
631
0.118
Power on Reset IP, Input: 1.2V, Vrr=0.8V, Vfr=0.65V, UMC 55nm LP process
Vrr=0.8V, Vfr=0.65V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....
632
0.118
Power on Reset IP, Input: 1.2V, Vrr=Vfr=0.8V, UMC 55nm LP process
Vrr=Vfr=0.8V, input VCC=1.2V, 1.2V Power On Reset, UMC 55nm 2T LP/RVT Low-K Logic process....
633
0.118
Power on Reset IP, Input: 1.5V - 3.9V, UMC 55nm SP process
3.9~1.5V (RTC Core Cell Library operating voltage+), Rise-relax voltage (Vrr), min. 1.6V (1.6V~2.3V) Power On Reset, UMC 55nm SP/RVT Low-K Logic proce...
634
0.118
Power on Reset IP, Input: 1.5V, UMC 0.15um SP process
Vrr=1.1V Vfr=0.95V, VCC=1.5V, B-type IO., Power On Reset, UMC 0.15um SP Logic process....
635
0.118
Power on Reset IP, Input: 1.8V, HJTC 0.18um eFlash/G2 process
Vrr=1.35V, Vfr=1.25V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....
636
0.118
Power on Reset IP, Input: 1.8V, Output: 1.8432MHz, HJTC 0.18um eFlash/G2 process
Vrr=1.4V, Vfr=1.15V, 1.8V Power on Reset, HJTC 0.18um eFlash 1.8V/3.3V/5V process....
637
0.118
Power on Reset IP, Input: 1.8V, UMC 0.153um MS process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.153um Mixed-Mode/Logic process....
638
0.118
Power on Reset IP, Input: 1.8V, UMC 0.162um Logic process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.162um Logic process....
639
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um eFlash/G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um e-Flash process....
640
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, B type IO, Power On Reset, UMC 0.18um GII Logic process....
641
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, C type IO, Power On Reset, UMC 0.18um GII Logic process....
642
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, D type IO, Power On Reset, UMC 0.18um GII Logic process....
643
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, VCC=1.8V, Ivcc=6.7uA, Core type, Power On Reset, UMC 0.18um GII Logic process....
644
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
FXPORD730HA0A 0.18um power on reset at the corner of D-type IO Vrr=1.2V Vfr=1V, Power On Reset, UMC 0.18um GII Logic process....
645
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....
646
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type (with Self-Test Circuit), Power On Reset, UMC 0.18um GII Logic process....
647
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um G2 process
Vrr=1.2V Vfr=1.0V, input 1.8V, Core type, Power On Reset, UMC 0.18um GII Logic process....
648
0.118
Power on Reset IP, Input: 1.8V, UMC 0.18um LL process
Vrr=1.2V Vfr=1.1V, VCC=1.8V, Ivcc=12.2uA, Core type, Power On Reset, UMC 0.18um LL Logic process....
649
0.118
Power on Reset IP, Input: 2.5V - 3.3V, UMC 0.13um HS/FSG process
2.5V~3.3V POR, UMC 0.13um HS/FSG Logic process....
650
0.118
Power on Reset IP, Input: 2.5V, UMC 0.25um process
Vrr=1.8V Vfr=1.6V, VCC=2.5V, Ivcc=13.4uA, B type IO, Power On Reset, UMC 0.25um Logic process....